DESC0024764
Project Grant
Overview
Grant Description
A cold ASIC for streaming readout of segmented detectors
Awardee
Grant Program (CFDA)
Awarding Agency
Funding Agency
Place of Performance
Culver City,
California
90230-4650
United States
Geographic Scope
Single Zip Code
Related Opportunity
Pacific Microchip was awarded
Project Grant DESC0024764
worth $200,000
from the Office of Science in February 2024 with work to be completed primarily in Culver City California United States.
The grant
has a duration of 9 months and
was awarded through assistance program 81.049 Office of Science Financial Assistance Program.
The Project Grant was awarded through grant opportunity FY 2024 Phase I Release 1.
SBIR Details
Research Type
SBIR Phase I
Title
A Cold ASIC for Streaming Readout of Segmented Detectors
Abstract
Pacific Microchip Corp. proposes to develop a cryogenic ASIC which includes a 32-channel 12-bit 1GS/s ADC followed by a data processing back-end supporting detector streaming readout. The integrated event building function will compress the data up to 10,000:1 ratio to reduce the interface complexity and power consumption. In the ASICĺs ADC operation mode, the raw data from the 32-channel ADC will be routed out directly through the JESD204B standard compliant data interface. This function is expected to greatly increase ASICĺs commercialization potential. The ASIC will leverage previously developed and silicon- proven IP: a 32-channel 12-bit ADC, an advanced event building function, a CPU, an Ethernet MAC, and interfaces such as a JESD204B, a GTMII and an I2C as well as other blocks. The ASIC will be packaged in ball grid array (BGA) package that was developed for other ASICs and tested. The chip carrier has its temperature coefficient of expansion (TCE) matched with the TCE of the PCB material. This is expected to greatly increase the mechanical reliability of the assembly when it is repeatedly exposed to cryogenic temperatures. Within the proposed project, Pacific Microchip Corp. will prove the feasibility of device implementation (Phase I), design, fabricate and test down to LN2 temperatures (Phase II) a cold ASIC for streaming readout of segmented detectors. In addition to its streaming detector readout and event processing function, the proposed ASIC offers a low- cost, low power solution of a 32-channel 12-bit 1GS/s ADC with the JESD204B standard compliant data interface. The ASIC can find application in imaging systems for airport security, border/customs control, industrial radiography for non-destructive defect detection, radiography in medicine. Cryogenic electronics plays a fundamental role in spacecraft, metrology, superconductive astronomical detectors, and quantum computing. Our ASIC offers these systems to shrink in size, reduce in cost and save power. According to the analysis provided by Future Market Insights, the ADC market is anticipated to reach a value of $3.51B in 2023 and a staggering $6.13B billion by 2033.
Topic Code
C57-34b
Solicitation Number
DE-FOA-0003110
Status
(Complete)
Last Modified 2/5/24
Period of Performance
2/12/24
Start Date
11/11/24
End Date
Funding Split
$200.0K
Federal Obligation
$0.0
Non-Federal Obligation
$200.0K
Total Obligated
Activity Timeline
Additional Detail
Award ID FAIN
DESC0024764
SAI Number
None
Award ID URI
SAI EXEMPT
Awardee Classifications
Small Business
Awarding Office
892430 SC CHICAGO SERVICE CENTER
Funding Office
892401 SCIENCE
Awardee UEI
HRMGH9U56EQ1
Awardee CAGE
5MSR9
Performance District
CA-37
Senators
Dianne Feinstein
Alejandro Padilla
Alejandro Padilla
Modified: 2/5/24