2423362
Project Grant
Overview
Grant Description
SBIR Phase I: Nanoscale hybrid optical interconnect platform - The broader impact/commercial impacts of this Small Business Innovation Research (SBIR) Phase I project will involve revolutionizing internal computer chip connections, called interconnects, by replacing materials like copper with light-based connections.
The high-speed interconnects are the information highways of modern-day computing systems, and, unfortunately, these highways are hitting fundamental peak capacities and interconnects are now a critical limiter to computer system performance.
This project will advance photonic integrated circuits and computer interconnects by researching commercialization pathways for a new photonic approach, called Coupled Hybrid Plasmonics (CHP), that uses the interaction of light and metals to squeeze light and devices down to nanometer-scale sizes.
Commercialized CHP will potentially enable durable interconnect product advantages in bandwidth, power, area, and cost.
The ultimate go-to-market motivation for commercializing CHP is to enable short-distance (meters down to millimeters), all-optical interconnects and replace electronic interconnects in computer systems (e.g., in the multi-trillion-dollar information technology and telecommunications markets).
The first commercialization challenge for CHP is to develop a manufacturing flow that uses mainstream processing.
This Small Business Innovation Research (SBIR) Phase I project will bridge the gap between CHP principles and industrial manufacturing.
The primary challenge this project faces is that the CHP effect requires a new multi-layer stack – metals, dielectrics, and semiconductors – that does not exist today in mainstream silicon-photonics/semiconductor chip manufacturing facilities.
Industrial CHP manufacturing recipes and device architectures are the gateway to future proof-of-concept prototypes and then products.
The project will employ industry-standard simulation and modeling tools to rapidly design and evaluate candidate CHP recipes, devices, and circuits.
It will quantitatively benchmark CHP devices and transceivers against today’s state-of-the-art silicon photonic circuits (e.g., ring-resonator based) and assess candidates based on the bandwidth, area, and energy consumption they achieve.
The overall project goal is to create preliminary industrial manufacturing recipes and a design-library of CHP-based devices and transceiver circuits.
This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the foundation's intellectual merit and broader impacts review criteria.
Subawards are not planned for this award.
The high-speed interconnects are the information highways of modern-day computing systems, and, unfortunately, these highways are hitting fundamental peak capacities and interconnects are now a critical limiter to computer system performance.
This project will advance photonic integrated circuits and computer interconnects by researching commercialization pathways for a new photonic approach, called Coupled Hybrid Plasmonics (CHP), that uses the interaction of light and metals to squeeze light and devices down to nanometer-scale sizes.
Commercialized CHP will potentially enable durable interconnect product advantages in bandwidth, power, area, and cost.
The ultimate go-to-market motivation for commercializing CHP is to enable short-distance (meters down to millimeters), all-optical interconnects and replace electronic interconnects in computer systems (e.g., in the multi-trillion-dollar information technology and telecommunications markets).
The first commercialization challenge for CHP is to develop a manufacturing flow that uses mainstream processing.
This Small Business Innovation Research (SBIR) Phase I project will bridge the gap between CHP principles and industrial manufacturing.
The primary challenge this project faces is that the CHP effect requires a new multi-layer stack – metals, dielectrics, and semiconductors – that does not exist today in mainstream silicon-photonics/semiconductor chip manufacturing facilities.
Industrial CHP manufacturing recipes and device architectures are the gateway to future proof-of-concept prototypes and then products.
The project will employ industry-standard simulation and modeling tools to rapidly design and evaluate candidate CHP recipes, devices, and circuits.
It will quantitatively benchmark CHP devices and transceivers against today’s state-of-the-art silicon photonic circuits (e.g., ring-resonator based) and assess candidates based on the bandwidth, area, and energy consumption they achieve.
The overall project goal is to create preliminary industrial manufacturing recipes and a design-library of CHP-based devices and transceiver circuits.
This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the foundation's intellectual merit and broader impacts review criteria.
Subawards are not planned for this award.
Awardee
Funding Goals
THE GOAL OF THIS FUNDING OPPORTUNITY, "NSF SMALL BUSINESS INNOVATION RESEARCH (SBIR)/ SMALL BUSINESS TECHNOLOGY TRANSFER (STTR) PROGRAMS PHASE I", IS IDENTIFIED IN THE LINK: HTTPS://WWW.NSF.GOV/PUBLICATIONS/PUB_SUMM.JSP?ODS_KEY=NSF23515
Grant Program (CFDA)
Awarding / Funding Agency
Place of Performance
Austin,
Texas
78701-3258
United States
Geographic Scope
Single Zip Code
Lumoniq was awarded
Project Grant 2423362
worth $275,000
from National Science Foundation in July 2024 with work to be completed primarily in Austin Texas United States.
The grant
has a duration of 7 months and
was awarded through assistance program 47.084 NSF Technology, Innovation, and Partnerships.
The Project Grant was awarded through grant opportunity NSF Small Business Innovation Research / Small Business Technology Transfer Phase I Programs.
SBIR Details
Research Type
SBIR Phase I
Title
SBIR Phase I: Nanoscale Hybrid Optical Interconnect Platform
Abstract
The broader impact/commercial impacts of this Small Business Innovation Research (SBIR) Phase I project will involve revolutionizing internal computer chip connections, called interconnects, by replacing materials like copper with light-based connections. The high-speed interconnects are the information highways of modern-day computing systems, and, unfortunately, these highways are hitting fundamental peak capacities and interconnects are now a critical limiter to computer system performance. This project will advance photonic integrated circuits and computer interconnects by researching commercialization pathways for a new photonic approach, called coupled hybrid plasmonics (CHP), that uses the interaction of light and metals to squeeze light and devices down to nanometer-scale sizes. Commercialized CHP will potentially enable durable interconnect product advantages in bandwidth, power, area, and cost. The ultimate go-to-market motivation for commercializing CHP is to enable short-distance (meters down to millimeters), all-optical interconnects and replace electronic interconnects in computer systems (e.g., in the multi-trillion-dollar Information Technology and Telecommunications markets). The first commercialization challenge for CHP is to develop a manufacturing flow that uses mainstream processing.
This Small Business Innovation Research (SBIR) Phase I project will bridge the gap between CHP principles and industrial manufacturing. The primary challenge this project faces is that the CHP effect requires a new multi-layer stack – metals, dielectrics, and semiconductors – that does not exist today in mainstream silicon-photonics/semiconductor chip manufacturing facilities. Industrial CHP manufacturing recipes and device architectures are the gateway to future proof-of-concept prototypes and then products. The project will employ industry-standard simulation and modeling tools to rapidly design and evaluate candidate CHP recipes, devices, and circuits. It will quantitatively benchmark CHP devices and transceivers against today’s state-of-the-art silicon photonic circuits (e.g., ring-resonator based) and assess candidates based on the bandwidth, area, and energy consumption they achieve. The overall project goal is to create preliminary industrial manufacturing recipes and a design-library of CHP-based devices and transceiver circuits.
This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
Topic Code
PH
Solicitation Number
NSF 23-515
Status
(Complete)
Last Modified 7/23/24
Period of Performance
7/15/24
Start Date
2/28/25
End Date
Funding Split
$275.0K
Federal Obligation
$0.0
Non-Federal Obligation
$275.0K
Total Obligated
Activity Timeline
Additional Detail
Award ID FAIN
2423362
SAI Number
None
Award ID URI
SAI EXEMPT
Awardee Classifications
Small Business
Awarding Office
491503 TRANSLATIONAL IMPACTS
Funding Office
491503 TRANSLATIONAL IMPACTS
Awardee UEI
GY2LVJBEBBF2
Awardee CAGE
9GYC2
Performance District
TX-37
Senators
John Cornyn
Ted Cruz
Ted Cruz
Modified: 7/23/24