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2345076

Cooperative Agreement

Overview

Grant Description
Nsf Convergence Accelerator Track I: Futur-ic: A Sustainable Microchip Manufacturing Alliance -the balance between human existence and microchip benefits is being severely challenged by a relentless and unsustainable appetite for electronics consumption. The Futur-ic Global Alliance for Sustainable Microchip Manufacturing creates self-consistent 3D technology, ecology, and workforce solutions to sustain the continued progress of the semiconductor manufacturing and the information systems industry, which is confronted with limits to transistor size, to its environmental footprint, and to its workforce pipeline readiness.

Good business requires multi-dimensional decisions based on the consequences for people, planet, and profits. Frontier constraints in the microchip industry are: 1) Technology/profits: enhanced microchip functionality for next generation applications such as AI, 6G, LiDAR etc. can no longer depend solely on shrinking the dimensions of a transistor; 2) Ecology/planet: net zero environmental impact for a product life cycle is critical to life on Earth; 3) Workforce/people: leadership from a new green-literate STEM workforce is required.

Concurrently engineered solutions are expected to build a common learning curve to power the next 40 years of progress for the semiconductor industry. Futur-ic will: 1) Benefit consumers: enhance life while targeting net zero environmental impact by 2050; 2) Foster future innovators and enhance full-spectrum workforce training: extend green literacy in microchip technologies to recruit and retain from K-Gray; 3) Increase DEIA: support diversity in leadership, gender, ethnicity, and cultural backgrounds, to ensure that research is informed by a broad range of perspectives to shape future technology trajectories; 4) Transform the global microchip supply chain: provide coherent technology evolution within the constraints of the environmental and social impacts of processes and designs.

Technology: dimensional scaling of transistors is approaching atomic dimensions, with cost/energy/bandwidth-density requirements challenging fundamental physics. The emerging near-term sustainable solution is photonics for communication and electronics for computation, and hence Futur-ic is investigating (i) innovation in sustainable electronic-photonic package (EPP) with I/O >1 PB/s within a net zero process envelope, as its driver, to obtain low materials-consumption, reliable, ultralow power, and low insertion loss coupling, of high bandwidth fiber optics to the microchip package with planar, non-planar, and pluggable optical connection; (ii) design for UR4 (upgrade, reduce, reuse, recycle, repair) to minimize e-waste; and (iii) PFAS measurement and removal from chip fabrication and packaging processes to reduce toxic effluent.

Ecology: the industry needs a consensus-based analytical and quantifiable life cycle assessment (LCA) toolkit to guide roadmap projections. Futur-ic with its integrative and interdisciplinary contributions will build the analytical capability in the product lifecycle to obtain the first-ever comprehensive, rapid, environmental, social, and current, data-driven figures of merit with footprints and handprints.

Workforce: microchip workforce needs are led by capacity, green-literacy, and capability for innovation. Futur-ic will create a green-literacy-skilled innovative workforce educated with blended learning content in STEM, semiconductor technology, and sustainability, using instructional design and leading-edge learning science to deliver a curriculum that is effective for perennial reskilling and upskilling.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria. Subawards are planned for this award.
Funding Goals
THE GOAL OF THIS FUNDING OPPORTUNITY, "NSF CONVERGENCE ACCELERATOR PHASES 1 AND 2 FOR THE 2022 COHORT - TRACKS H, I, J", IS IDENTIFIED IN THE LINK: HTTPS://WWW.NSF.GOV/PUBLICATIONS/PUB_SUMM.JSP?ODS_KEY=NSF22583
Awarding / Funding Agency
Place of Performance
Cambridge, Massachusetts 02139-4301 United States
Geographic Scope
Single Zip Code
Analysis Notes
Amendment Since initial award the total obligations have increased 150% from $2,000,000 to $5,000,000.
Massachusetts Institute Of Technology was awarded Futur-ic: Sustainable Microchip Alliance Cooperative Agreement 2345076 worth $5,000,000 from National Science Foundation in December 2023 with work to be completed primarily in Cambridge Massachusetts United States. The grant has a duration of 3 years and was awarded through assistance program 47.084 NSF Technology, Innovation, and Partnerships. The Cooperative Agreement was awarded through grant opportunity NSF Convergence Accelerator Phases 1 and 2 for the 2022 Cohort - Tracks H, I, J.

Status
(Ongoing)

Last Modified 9/18/25

Period of Performance
12/15/23
Start Date
11/30/26
End Date
61.0% Complete

Funding Split
$5.0M
Federal Obligation
$0.0
Non-Federal Obligation
$5.0M
Total Obligated
100.0% Federal Funding
0.0% Non-Federal Funding

Activity Timeline

Interactive chart of timeline of amendments to 2345076

Subgrant Awards

Disclosed subgrants for 2345076

Transaction History

Modifications to 2345076

Additional Detail

Award ID FAIN
2345076
SAI Number
None
Award ID URI
SAI EXEMPT
Awardee Classifications
Private Institution Of Higher Education
Awarding Office
491502 INNOVATION AND TECHNOLOGY ECOSYSTEMS
Funding Office
491501 TECHNOLOGY FRONTIERS
Awardee UEI
E2NYLCDML6V1
Awardee CAGE
80230
Performance District
MA-07
Senators
Edward Markey
Elizabeth Warren
Modified: 9/18/25