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2335496

Project Grant

Overview

Grant Description
Sbir Phase I: Ultra-Low Loss Beamformer and Combiner-First Technology for Lower Power, Consumption Phased Arrays -this small business innovation research (SBIR) Phase I project is to develop a new phased array communication technology which will be able to achieve lower power consumption, smaller form factors, and more affordable price targets.

Phased arrays antennas are essential for satellite communications and the broader 5G, defense, and automotive radar markets. The company?s new phased array architecture will significantly decrease the power consumption and the number of silicon chipsets that are required.

This is particularly important in thermally limited and power-constrained environments like mobile platforms and satellite communication systems and leads to the reduction of batteries, bulky power supplies, and additional cooling components. Addressing the high cost and power consumption of these phased arrays will have a significant, positive impact on the commercial opportunity by enabling step changes in performance (like data rates and capacity) or reducing costs for sensitive customer segments.

This small business innovation research Phase I project will demonstrate a more power-efficient and cost-effective phased array semiconductor technology. This technology uses a novel ultra-low loss, high-linearity, passive beamforming circuit in a unique low-power architecture.

In the receive configuration, this technology will be able to achieve a 75% reduction in power consumption due to a 4x reduction in the number of receiver signal chains. In Phase I, the company aims to advance their ultra-low loss beamforming technology to achieve even lower losses, which will enable the combination of the beamformer with their unique low-power architecture.

The following objectives realize these goals: 1) development of the novel ultra-low loss beamformer and integration with a receive front-end, 2) fabrication and performance of benchtop testing on the integrated receive circuit, and 3) performance of over-the-air testing of small and moderately sized phased arrays using the receive circuit.

The low-power beamforming technology will overhaul current phased arrays, eliminating many of the lossy, power-intensive and expensive components traditional units require. This technology will enable the creation of higher performance, lower cost phased arrays for many critical industries ranging from satellite communication to 5G to radar.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the foundation's intellectual merit and broader impacts review criteria.- subawards are not planned for this award.
Funding Goals
THE GOAL OF THIS FUNDING OPPORTUNITY, "NSF SMALL BUSINESS INNOVATION RESEARCH (SBIR)/ SMALL BUSINESS TECHNOLOGY TRANSFER (STTR) PROGRAMS PHASE I", IS IDENTIFIED IN THE LINK: HTTPS://WWW.NSF.GOV/PUBLICATIONS/PUB_SUMM.JSP?ODS_KEY=NSF23515
Awarding / Funding Agency
Place of Performance
San Bruno, California 94066-4135 United States
Geographic Scope
Single Zip Code
OSO Semiconductor was awarded Project Grant 2335496 worth $274,992 from National Science Foundation in December 2023 with work to be completed primarily in San Bruno California United States. The grant has a duration of 1 year and was awarded through assistance program 47.084 NSF Technology, Innovation, and Partnerships. The Project Grant was awarded through grant opportunity NSF Small Business Innovation Research / Small Business Technology Transfer Phase I Programs.

SBIR Details

Research Type
SBIR Phase I
Title
SBIR Phase I: Ultra-low loss beamformer and combiner-first technology for lower power, consumption phased arrays
Abstract
This Small Business Innovation Research (SBIR) Phase I project is to develop a new phased array communication technology which will be able to achieve lower power consumption, smaller form factors, and more affordable price targets. Phased arrays antennas are essential for satellite communications and the broader 5G, defense, and automotive radar markets. The company’s new phased array architecture will significantly decrease the power consumption and the number of silicon chipsets that are required. This is particularly important in thermally limited and power-constrained environments like mobile platforms and satellite communication systems and leads to the reduction of batteries, bulky power supplies, and additional cooling components. Addressing the high cost and power consumption of these phased arrays will have a significant, positive impact on the commercial opportunity by enabling step changes in performance (like data rates and capacity) or reducing costs for sensitive customer segments. This Small Business Innovation Research Phase I project will demonstrate a more power-efficient and cost-effective phased array semiconductor technology. This technology uses a novel ultra-low loss, high-linearity, passive beamforming circuit in a unique low-power architecture. In the receive configuration, this technology will be able to achieve a 75% reduction in power consumption due to a 4x reduction in the number of receiver signal chains. In Phase I, the company aims to advance their ultra-low loss beamforming technology to achieve even lower losses, which will enable the combination of the beamformer with their unique low-power architecture. The following objectives realize these goals: 1) development of the novel ultra-low loss beamformer and integration with a receive front-end, 2) fabrication and performance of benchtop testing on the integrated receive circuit, and 3) performance of over-the-air testing of small and moderately sized phased arrays using the receive circuit. The low-power beamforming technology will overhaul current phased arrays, eliminating many of the lossy, power-intensive and expensive components traditional units require. This technology will enable the creation of higher performance, lower cost phased arrays for many critical industries ranging from satellite communication to 5G to radar. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
Topic Code
S
Solicitation Number
NSF 23-515

Status
(Complete)

Last Modified 12/21/23

Period of Performance
12/15/23
Start Date
11/30/24
End Date
100% Complete

Funding Split
$275.0K
Federal Obligation
$0.0
Non-Federal Obligation
$275.0K
Total Obligated
100.0% Federal Funding
0.0% Non-Federal Funding

Activity Timeline

Interactive chart of timeline of amendments to 2335496

Additional Detail

Award ID FAIN
2335496
SAI Number
None
Award ID URI
SAI EXEMPT
Awardee Classifications
For-Profit Organization (Other Than Small Business)
Awarding Office
491503 TRANSLATIONAL IMPACTS
Funding Office
491503 TRANSLATIONAL IMPACTS
Awardee UEI
RV3AACLWM8D9
Awardee CAGE
9FKM0
Performance District
CA-15
Senators
Dianne Feinstein
Alejandro Padilla
Modified: 12/21/23