2242381

SBIR Phase II: Integration of Heterogeneous Device Technologies - The broader/commercial impact of this Small Business Innovation Research (SBIR) Phase II project will be a disruption to the growing communications marketplace (> $4.7B market by 2026) which is limited by the capabilities of semiconductor manufacturing processes and the cost of compound semiconductors such as Gallium Nitride (GAN).

This project will reimagine the semiconductor manufacturing process by bringing compound and silicon-based semiconductors together to reduce system costs relative to solutions using only single device technologies. This project will assemble future systems for the burgeoning communications and sensing industries in a proprietary technology platform to support a shift in manufacturing technology that spans from lithographic patterning to the assembly of the smallest constituent parts.

Finally, the project will enable low-cost, automated semiconductor manufacturing to help the United States regain leadership in silicon semiconductor manufacturing while helping US-based semiconductor foundries define new markets. This Small Business Innovation Research (SBIR) Phase II project is a first-of-its-kind analysis of failure mechanisms in heterogeneous semiconductors and the design of unique mixed-signal circuitry that improves the yield and reliability in integrated circuits.

Heterogeneous integration of semiconductors with different fundamental material properties has been an emerging goal for "Beyond Moore's Law" semiconductors. Radio Frequency (RF) and millimeter-wave integrated circuits will benefit in performance by circumventing fundamental limitations with all silicon approaches. The project will develop new approaches from materials to systems around an optimization of devices to meet performance objectives such as output power, linearity, and noise while leveraging the intimate integration with mixed-signal approaches based in silicon to provide calibration, compensation, and predistortion of RF imperfections.

While low levels of heterogeneous integration have been demonstrated in millimeter-wave bands, the integrated circuit technology will require dozens and even hundreds of III-V devices integrated on a common platform with millions of silicon transistors. The proposed effort will assess the failure mechanisms associated with the assembly and operation of new integrated circuits and approaches to mitigate these problems to reduce the cost of bringing next-generation products to market.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

Pseudolithic

THE GOAL OF THIS FUNDING OPPORTUNITY, "NSF SMALL BUSINESS INNOVATION RESEARCH PHASE II (SBIR)/ SMALL BUSINESS TECHNOLOGY TRANSFER (STTR) PROGRAMS PHASE II", IS IDENTIFIED IN THE LINK: HTTPS://WWW.NSF.GOV/PUBLICATIONS/PUB_SUMM.JSP?ODS_KEY=NSF22552

47.084 - NSF Technology, Innovation, and Partnerships

National Science Foundation (NSF)

Santa Barbara, California 93105-1914 United States

Single Zip Code

22-552

Amendment Since initial award the End Date has been extended from 04/30/25 to 08/31/25.