National Advanced Packaging Manufacturing Program (NAPMP) Advanced Packaging Research and Development (R&D)

Background
The National Advanced Packaging Manufacturing Program (NAPMP) is part of the U.S. Department of Commerce's CHIPS for America initiative, which aims to bolster semiconductor research and development and expand domestic manufacturing capacity.

The NAPMP focuses on advancing U.S. leadership in semiconductor advanced packaging, which is critical for applications such as high-performance computing and artificial intelligence. This Notice of Funding Opportunity (NOFO) seeks proposals for research and development activities that will establish and accelerate domestic semiconductor advanced packaging through investments in five key R&D areas.

Grant Details
The NOFO outlines five specific R&D areas for proposals:

(1) Equipment, Tools, Processes, and Process Integration;
(2) Power Delivery and Thermal Management;
(3) Connector Technology, including Photonics and Radio Frequency (RF);
(4) Chiplets Ecosystem; and
(5) Co-design/Electronic Design Automation (EDA).

Projects must include basic and applied research, development of systems, equipment, tools, software systems, commercial viability analyses, integrated education and workforce development, and prototype production. Each project should focus on one R&D area with defined milestones marking measurable progress toward technical targets.

Eligibility Requirements
Eligible applicants include domestic non-profit organizations, accredited institutions of higher education, state, local, tribal governments, and domestic for-profit organizations. A domestic entity is defined as one incorporated within the United States or its territories with its principal place of business in the U.S.

Period of Performance
The period of performance for projects under this NOFO is structured around a five-year timeframe.

Grant Value
CHIPS R&D anticipates making available up to approximately $1,550,000,000 for funding multiple awards ranging from approximately $10,000,000 to $150,000,000 in federal funds per award over the five-year period. Specific maximum funding amounts per R&D area are:

- Equipment/Tools/Processes ($450M max award $150M)
- Power Delivery/Thermal Management ($250M max award $50M)
- Connector Technology ($250M max award $100M)
- Chiplets Ecosystem ($300M max award $75M)
- Co-design/EDA ($250M max award $100M).

Place of Performance
The grant activities are expected to be performed within the United States.