Manufacturing Scale-up of 500C Capable, Kilo-Byte Scale, Non-Volatile Memory

OUSD (R&E) CRITICAL TECHNOLOGY AREA(S): Microelectronics OBJECTIVE: The objective of this project is to mature high-temperature, non-volatile memory (HT-NVM) technology that provides reliable data retention and robust performance under extreme thermal conditions, specifically at 500 C temperatures. This program seeks 6" wafer-scale module and chip level manufacturing of HT-NVM arrays of at least 2 kB in size per module. The program seeks to address several manufacturing and reliability challenges associated with kB level scaling of the NVM including variation in ON/OFF ratios, bit failure rates and cycling endurance as a function of reducing cell sizes at temperatures up to 600 C. DESCRIPTION: Thermally hardened electronics are necessary for future DAF platforms. The current state-of-the-art solution for these applications involves thermally isolating and/or actively cooling silicon-based electronics. Although recent advances in SiC logic have paved the way for high-temperature microprocessors, significant challenges persist in developing non-volatile, reprogrammable memory and in integrating memory with logic to realize computation in extreme environments. Using volatile memory, such as SRAM or DRAM, is expensive, power hungry and therefore unaffordable in high-temperature environments, where processing power is limited. The only non-volatile memory (NVM) option available today is commercial off the shelf flash memory, which is rated only up to 250 C, is slow (millisecond write time per cell), has a very limited write endurance at temperature and has to be refreshed frequently. Program deliverables will include demonstration and supply of 6" wafers with memory arrays. PHASE I: AFRL/RXE has funded low TRL development of high temperature non-volatile memory. This resulted in successful demonstration of a ferroelectric diode based-memory technology, established a cross bar array design, and demonstrated memory cell level stability up to 600C. At 600C, the devices exhibit one million read cycles and readable on/off ratios above 1 for over 60 h. The operating voltages of the AlScN ferrodiodes are less than 15 V at 600C and are thus compatible with silicon-carbide-based high-temperature logic technology Additionally, this approach is silicon CMOS compatible and can be incorporated in the back-end-of-line (BEOL) processes. PHASE II: The successful Phase 2 effort will build on emerging high temperature electronics technology such as ferroelectric memory elements & correlated electron oxide memory elements, to demonstrate read/write capabilities in extreme thermal environments. The contractor will establish a research and development strategy that addresses key manufacturing hurdles in scalable memory fabrication and integration. There is currently no commercially available memory technology that is able to be manufactured in commercial microelectronics foundries, small enough to provide reasonable data densities, and capable of repeated read/write cycles at temperatures above 250 C. Candidate memory technologies must show the potential to satisfy these requirements. The associated read/write protocols should require voltage and current levels that can reasonably be achieved in an integrated microprocessor on a remote air or space platform. PHASE III DUAL USE APPLICATIONS: The contractor will pursue commercialization of the various technologies developed in Phase II for transitioning expanded mission capability to a broad range of potential government and civilian users and alternate mission applications. Direct access with end users and government customers will be provided with opportunities to receive Phase III awards for providing the government additional research & development, or direct procurement of products and services developed in coordination with the program. REFERENCES: 1. Pradhan, D.K., Moore, D.C., Kim, G. et al. A scalable ferroelectric non-volatile memory operating at 600 C. Nat Electron 7, 348 355 (2024). 2. Suga, H., Suzuki, H., Shinomura, Y. et al. Highly stable, extremely high-temperature, nonvolatile memory based on resistance switching in polycrystalline Pt nanogaps. Sci Rep 6, 34961 (2016). 3. Drury, D.; Yazawa, K.; Zakutayev, A.; Hanrahan, B.; Brennecka, G. High-Temperature Ferroelectric Behavior of Al0.7Sc0.3N. Micromachines 2022, 13, 887. 4. Suga, H. High-temperature non-volatile memory technology. Nat Electron 7, 330 331 (2024). KEYWORDS: High temperature electronics; non-volatile memory; extreme environments;