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High Performance Onboard Computing

ID: ENABLE.2.S26B • Type: SBIR / STTR Topic • Match:  90%
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Description

NASA is seeking avionics technologies to broadly enable increased onboard compute capability for future exploration and science missions. As future missions require increasingly complex distant operations, there will be an increased need for autonomy, as well as onboard data reduction where sensor bandwidth exceeds downlink bandwidth. This subtopic seeks to develop and mature technologies to provide increased onboard processing performance, AI/ML capabilities, input/output (I/O) bandwidth, and data storage. Technologies of interest include, but are not limited to, Sensor Open Systems Architecture (SOSA) Space compatible Plug-In Cards (PICs) and Power Supply Cards (PSCs), coprocessors that augment general purpose processing or provide mission-specific capabilities, and software tools and libraries to improve performance of space computing applications while simplifying their development.

Overview

Response Deadline
May 21, 2026 Past Due
Posted
April 21, 2026
Open
April 21, 2026
Set Aside
Small Business (SBA)
NAICS
None
PSC
None
Place of Performance
Not Provided
Source
Alt Source
Program
SBIR Phase I
Structure
None
Phase Detail
Phase I: Establish the technical merit, feasibility, and commercial potential of the proposed R/R&D efforts and determine the quality of performance of the small business awardee organization.
Duration
6 Months
Size Limit
500 Employees
On 4/21/26 National Aeronautics and Space Administration issued SBIR / STTR Topic ENABLE.2.S26B for High Performance Onboard Computing due 5/21/26.

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