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High-G Accelerometers

ID: DMEA231-001 • Type: SBIR / STTR Topic • Match:  85%
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Description

OUSD (R&E) CRITICAL TECHNOLOGY AREA(S): Microelectronics The technology within this topic is restricted under the International Traffic in Arms Regulation (ITAR), 22 CFR Parts 120-130, which controls the export and import of defense-related material and services, including export of sensitive technical data, or the Export Administration Regulation (EAR), 15 CFR Parts 730-774, which controls dual use items. Offerors must disclose any proposed use of foreign nationals (FNs), their country(ies) of origin, the type of visa or work permit possessed, and the statement of work (SOW) tasks intended for accomplishment by the FN(s) in accordance with the Announcement. Offerors are advised foreign nationals proposed to perform on this topic may be restricted due to the technical data under US Export Control Laws. OBJECTIVE: The DoD is seeking the development of a low cost, military temperature rated (storage -55 C to 125 C; operational -40 C to 55 C), US-sourced, tri-axis accelerometer capable of surviving up to 60 kG. Current commercially available accelerometers survive up to 35 kG under test. The device shall have a 10 s low recovery time after being subjected to the shock environment. The device shall also seek to incorporate test modes and self-bias correction. The device shall be printed circuit board (PCB) surface mountable with a large central electrically conductive pad for mechanical stability and seek to minimize the overall footprint and volume to the maximum extent possible. DESCRIPTION: Many fuzing applications for the DoD require the sensing and validation of unique launch environments in order to provide safety prior to arming a munition. Many of these munitions must not only survive harsh military environments, but also must survive and reliably function during and after high-G acceleration events associated with munition launch [1]. For given applications and specifications there are various accelerometer architectures with special attention to high-G accelerometers [2]. Prior work has been successful with silicon carbide (SiC) microelectromechanical systems (MEMS)-based solutions [3, 4]. Preferably, the proposed device can be produced in existing commercial MEMS fabrication facilities without any additional capital costs. Ideally, the manufacturing process will be done on at least 6 substrates to facilitate volume production. Ideally, full production devices will cost less than $100 per single device to customers. PHASE I: Conduct a feasibility study and design of an accelerometer capable of surviving up to 60 kG. The methods and considerations for simulation of accelerometers in a high-G environment shall be described. Accelerometer architecture and methods of microfabrication shall be defended regarding the following application-based specifications: 1. In addition to the 60 kG survival specification, the accelerometer requires a typical recovery time of 10 s while exhibiting a zero shift no greater than 3%. 2. The accelerometer shall operate over the temperature range (-40 C to 55 C), with a temperature stability of less than or equal to 5mG/oC and nonlinearity of +/- 1%. 3. The US Government is initially interested in an accelerometer working with a sense range of +/- 25 kG and a sensitivity resolution of 0.1mV/G. 4. The accelerometer shall have a cross axis sensitivity of less than or equal to 3% and a resonant frequency of greater than 18 kHz. 5. The accelerometer shall draw no more than 1 mA at 5 VDC. 6. The accelerometer shall have a turn on time of less than 1 ms. 7. The design of the accelerometer should also consider the US Government's interests in accelerometers with +/- 1 kG, +/- 10 kG, and +/- 50 kG sense ranges. The feasibility study shall detail the process and techniques used along with associated costs. If there are bulk quantity discounts factored in, the report shall disclose quantity price break points and which steps were discounted wherever relevant. In addition, it must include: 1. Proposed manufacturing processes flows and techniques used, including dicing and etching methodologies, along with figures and diagrams describing the process. 2. Bulk material and specification (i.e., crystal orientation, dopant species, resistivity, epi thickness if any, etc.). 3. Cost break down for manufacturing compared to existing (both commercial and research) and comparative theoretical options. 4. Methodologies and analysis techniques used for characterizing the proposed device (i.e., how will you demonstrate the device will survive a up 1G to 60kG event?). The delivered report shall fully describe the proposed techniques and characterization methodologies, including a notional list of fabrication tools, facility requirements, and a program plan for follow-on phase development. If any of the above items cannot be fully addressed, the report must include relevant research and rationale that demonstrates their inapplicability to the proposed technique. If adhering to the above items is possible, but not financially feasible, the report must include relevant justification. Finally, the challenges and special considerations for testing of accelerometers under high-G stress environments shall be addressed. Respondents shall deliver a report that satisfies all of the requirements outlined in Phase I. If any of the above items cannot be fully addressed in the Phase I feasibility report, the report must include relevant research and justification for their inapplicability. PHASE II: Build, test and deliver a fully functional accelerometer based on the design developed in Phase I. Demonstrate the capability of surviving 60 kG while adhering to the specifications outlined in Phase I. Production yields shall be considered to keep costs low with commercialization a viable option. The final report shall address manufacturing yield and reflect that the tested prototypes were selected from across multiple lots to demonstrate repeatability and quality with low variation within wafer, wafer to wafer, and lot to lot. If a non-random selection was required to optimize performance, the final report must detail reasoning for using non-random selection and the selection criteria used. Deliver a detailed final report that documents the cost breakdown per device, manufacturing processes utilized, fabrication toolset required to perform the proposed techniques, all facility requirements, and all electrical characterization and device design data (TCAD files, modeling/simulation results, etc.). If there are bulk quantity discounts factored in any of the cost breakdowns, the final report shall disclose quantity price break points and which steps were discounted where relevant. The final report shall contain sufficient technical detail such that an entity skilled in semiconductor fabrication can repeat the presented results. PHASE III DUAL USE APPLICATIONS: This technology could be utilized for other DoD and commercial applications where high-G and repeated shock events may occur, such as On-Board Recorders (ORBs), flight termination systems, airline black box flight recorders, or crash test instrumentation. REFERENCES: 1. T. G. Brown, Harsh military environments and microelectromechanical (MEMS) device , Proceedings of IEEE Sensors, vol 2, 2003; 2. V. Narasimhan et al, Micromachined high-g accelerometers: a review, J. Micromech. Microeng., vol 25, 2015; 3. Andrew Atwell et al, Simulation, fabrication and testing of bulk micromachined 6H-SiC high-g piezoresitive accelerometers , Sensors and Actuators, A 104, 2003; 4. Yanxin Zhai et al, Design, fabrication and test of a bulk SiC MEMS accelerometer , Microelectronic Engineering, 260, 2022 KEYWORDS: MEMS, Accelerometer, Transducer

Overview

Response Deadline
March 8, 2023 Past Due
Posted
Jan. 11, 2023
Open
Feb. 8, 2023
Set Aside
Small Business (SBA)
Place of Performance
Not Provided
Source
Alt Source

Program
SBIR Phase I / II
Structure
Contract
Phase Detail
Phase I: Establish the technical merit, feasibility, and commercial potential of the proposed R/R&D efforts and determine the quality of performance of the small business awardee organization.
Phase II: Continue the R/R&D efforts initiated in Phase I. Funding is based on the results achieved in Phase I and the scientific and technical merit and commercial potential of the project proposed in Phase II. Typically, only Phase I awardees are eligible for a Phase II award
Duration
6 Months - 1 Year
Size Limit
500 Employees
On 1/11/23 Defense Microelectronics Activity issued SBIR / STTR Topic DMEA231-001 for High-G Accelerometers due 3/8/23.

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