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Direct Etched Silicon Wafer Bonding for Micro-Electromechanical Systems (MEMS).

ID: N232-116 • Type: SBIR / STTR Topic

Description

OUSD (R&E) CRITICAL TECHNOLOGY AREA(S): Microelectronics;Nuclear;Space Technology The technology within this topic is restricted under the International Traffic in Arms Regulation (ITAR), 22 CFR Parts 120-130, which controls the export and import of defense-related material and services, including export of sensitive technical data, or the Export Administration Regulation (EAR), 15 CFR Parts 730-774, which controls dual use items. Offerors must disclose any proposed use of foreign nationals (FNs), their country(ies) of origin, the type of visa or work permit possessed, and the statement of work (SOW) tasks intended for accomplishment by the FN(s) in accordance with the Announcement. Offerors are advised foreign nationals proposed to perform on this topic may be restricted due to the technical data under US Export Control Laws. OBJECTIVE: Develop a reliable direct silicon wafer bonding process with etched wafers. DESCRIPTION: Direct silicon wafer bonding is the process of adhering two wafers together without any intermediate layers. Although this process is employed currently, it necessitates high standards in both surface geometry and roughness. Etched silicon wafers are often not considered for direct wafer bonding because of those standards. Adhesion layers, such as a eutectic metal layer, may overcome the stringent geometry standards required for direct bonding, but the mismatches of coefficient of thermal expansion (CTE) between the adhesion layer and the silicon device may lead to performance impacts for high stability sensors, such as long-term creep. Examples of existing research for direct wafer bonding can be found in the referenced articles [Refs 1-4]. MEMS sensors are more frequently being considered as alternatives to conventionally machined sensors in order to meet performance requirements in a low size, weight, and power (SWaP) package. This process is likely to bring value to multiple industries as the need for stability and reliability become more important. PHASE I: Design a direct wafer bonding process with the desired goals of 1) forming a complete bond with at least one etched silicon wafer (bond areas no less than 100 m x 100 m, etch depth no greater than 200 m); 2) demonstrating a hermetic seal with both an inert gas (such as dry nitrogen) or vacuum after dicing into separate devices; 3) ensuring reliability of the bond through thermal environments (between -55oC to 85oC) and mechanical environments such as vibration, shock, bond strength, and constant acceleration (see MIL-STD-883-2 for reference). The Phase I study shall assess all aspects of the bonding process and justify the feasibility and practicality of the designed approach. The Phase I Option, if exercised, will include the initial design specifications and capabilities to build a prototype solution in Phase II. PHASE II: Based on the Phase I design and execution plan, fabricate and characterize a small lot (up to Qty: 5 wafers) of silicon articles. This characterization may include hermetic leak checking, bond strength tests, and wafer uniformity for sample MEMS devices. Wafers will need to be etched, bonded, and diced to resemble a typical MEMS device process. The prototypes, test samples, and characterization results should be delivered by the end of Phase II. PHASE III DUAL USE APPLICATIONS: Based on the prototypes developed in Phase II, continuing development must lead to productization of the direct wafer bonding process. Qualify this product by inserting and demonstrating the bonding process into a known microfabrication process for a MEMS design. If required, subject the devices incorporating the wafer bonding process to several common test environments, including radiation and vibration environments. While this technology is aimed at multiple national interest applications, wafer bonding is used more broadly in the MEMS industry. A direct bonding process for etched wafers is likely to bring value to existing commercial applications such as space and autonomous vehicle navigation to improve both the reliability and performance of high-end MEMS sensors. REFERENCES: 1. Gui, C.; Elwenspoek, M.; Tas, N. and Gardeniers, J.G.E. The effect of surface roughness on direct wafer bonding. Journal of Applied Physics, Vol. 85, No. 10, May 1999, pp. 7448-7454. https://aip.scitation.org/doi/abs/10.1063/1.369377 2. Moriceau, H.; Rieutord, F.; Fournel, F.; Le Tiec, Y.; Di Cioccio, L.; Morales, C.; Charvet, A.M. and Deguet, C. Overview of recent direct wafer bonding advances and applications. Advances in Natural Sciences: Nanoscience and Nanotechnology, Vol. 1, No. 4, December 2010. https://iopscience.iop.org/article/10.1088/2043-6262/1/4/043004/meta 3. Turner, K.T. and Spearing, S.M. Modeling of direct wafer bonding: Effect of wafer bow and etch patterns. Journal of Applied Physics, Vol. 92, No. 12, December 2002, pp. 7658-7666. https://aip.scitation.org/doi/abs/10.1063/1.1521792 4. Mehra, A.; Zhang, X.; Ayon, A.A.; Waitz, I.A.; Schmidt, M.A. and Spadaccini, C.M. "A six-wafer combustion system for a silicon micro gas turbine engine." Journal of Microelectromechanical Systems, Vol. 9, No. 4, December 2000, pp. 517-527. https://ieeexplore.ieee.org/abstract/document/896774 KEYWORDS: Direct wafer bonding; MEMS; micro-electromechanical; systems; microfabrication; wafers

Overview

Response Deadline
June 14, 2023 Past Due
Posted
April 19, 2023
Open
May 17, 2023
Set Aside
Small Business (SBA)
Place of Performance
Not Provided
Source
Alt Source

Program
SBIR Phase I / II
Structure
Contract
Phase Detail
Phase I: Establish the technical merit, feasibility, and commercial potential of the proposed R/R&D efforts and determine the quality of performance of the small business awardee organization.
Phase II: Continue the R/R&D efforts initiated in Phase I. Funding is based on the results achieved in Phase I and the scientific and technical merit and commercial potential of the project proposed in Phase II. Typically, only Phase I awardees are eligible for a Phase II award
Duration
6 Months - 1 Year
Size Limit
500 Employees
On 4/19/23 Department of the Navy issued SBIR / STTR Topic N232-116 for Direct Etched Silicon Wafer Bonding for Micro-Electromechanical Systems (MEMS). due 6/14/23.

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