TECHNOLOGY AREA(S): Electronics OBJECTIVE: Develop a Circumvention and Recovery (C&R) power and data management design to support functions for shutdown, restart and recovery of high performance processors, memory, System on Chip platforms, Radio Frequency, and advanced inertial measurement sensor subsystems. DESCRIPTION: Circumvention and Recovery (C&R) is a system approach to hardening electronics to nuclear weapon high dose rate pulsed radiation effects. The approach enables the overall system to meet strategic or High Altitude Exo-Atmospheric Nuclear Survivability (HAENS) specifications even though certain functions are implemented using components with lower hardness levels. This is done by selectively permitting certain functions to be implemented using parts that are more radiation sensitive. The upset modes of the sensitive parts are mitigated using various error handling, fault isolation, and power-down/reset functions that are implemented in upper radiation hardened parts. A typical C&R scheme may involve the use of a high performance processor that does not meet the system level upset requirement, but is provided a rapid and orderly reset function implemented with lower performance, upper rad hard logic or processor along with rad hard external memory for storing critical data. Circumvention and Recovery (C&R) support functions in terms of available and suitable power and data management for shutdown and restart has not kept pace with the proliferation of high performance processors, memory, System-on-chip (SoC) platforms, Radio Frequency (Global Positioning System and data link) and specialty functions such as Ring Laser Gyroscopes and Micro-electrical-mechanical System (MEMS) Inertial Measurement Units. The following capabilities are sought: Managing modern low-voltage high-current digital processing electronics' proliferation of unique power supplies and sequencing requirements Caching and reloading the large amounts of critical state data which must be recovered in order to enable re-acquisition of functionality within mission-appropriate timescales Enabling fast reacquisition of RF operation (Global Positioning System (GPS), command link) in systems which use complex waveforms Saving 3-axis, 3-angle position, velocity, acceleration data for non-inertial guidance systems in hardened nonvolatile memory Protecting power distribution / management resources attached to high performance processors and ensuring these Point Of Load (POL) resources are prevented from damaging their "clients" or from being damaged by various hostile or natural radiation environments Proposed solutions should support the following performance criteria: Dose rate detection, C&R sequencing coverage of multiple and mixed types of electronic content Power supplies from high (primary battery) to low voltage digital and low noise analog / RF Data cache and recovery needs for a broad range of processing and communications subsystems Radiation environments comprehensively suitable to offensive and defensive missile systems, satellite and tactical platforms Cost, reusability, portability and sustainability of the solution-set against long system life cycles and future technology trends PHASE I: Develop a proof of concept architecture that can circumvent and recover utilizing leading-edge hardened electronics in a radiation exposed environment. Identify communication protocols and redundancy schemes between functional elements of a guided missile system. Perform a robustness assessment of the initial architecture with respect to allowable frequency of resets, duration of circumvention, and tolerance to faults (such as low power, sensor dropout, clock skew, etc.) and survivable to the nuclear and space radiation environments. PHASE II: Mature concept system architecture into a design that handles faults (errors, radiation pulses, power dropouts) with defined degraded states and performance impacts. Identify and assess leading-edge electronics supporting capabilities (for high performance processors, memory, System on Chip platforms, RF, and advanced inertial measurement sensors) for their compatibility with concept architecture. Integrate compatible technologies into the design and perform an assessment of fault tolerance vs. performance capabilities. Develop an equivalent Simulation Program with Integrated Circuit Emphasis (SPICE) model as necessary to simulate key electrical behaviors of the operations and functions of the design. Simulations should support a model based approach in order to lead to a full understanding of the design prior to any radiation characterization tests. PHASE III: For follow-on Submarine Launched Ballistic Missile development, the small business would utilize C&R architecture and model to support feasibility studies for radiation environment requirements, technologies maturation, and performance feasibility assessments beginning in Fiscal Year 2020. Generically, the small business could participate in aerospace (satellite, missile and missile defense) Technology Maturation Risk Reduction (TMRR) & Engineering Manufacturing and Development (EMD) phase development to augment concept C&R architecture with necessary functions and requirements of the requisite development program. Logic and electronic designs that support fault tolerance for system-on-a-chip systems can be leverage by commercial space and could be applied to any system controlled by electronics. REFERENCES: 1. The Effects of Radiation on Electronic Systems, George C. Messenger and Milton S. Ash, 19862. Nuclear Matters Handbook 2016, Appendix E: Nuclear Survivability3. Military Standard 1766B, Nuclear Hardness & Survivability Program Requirements for ICBM Weapon Systems KEYWORDS: Circumvention And Recovery; Radiation Hardening; Space Electronics Architecture; Nuclear Event Detector; Nuclear Weapon Effects; Operate Through; Hostile Nuclear Survivability; Fault Tolerant Computing;
